Semiconductors

Relative performance vs SOXX across the semiconductor value chain
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SOXX Holdings Performance
Relative Performance vs SOXX
Current Drawdown
Performance Leaderboard
From To
Plot # Ticker Company Subsector Mkt Cap Period Ret CAGR Years Ann. Vol Sharpe β vs SMH Curr. DD
Charts
Equity curve & drawdown
Each line is rebased to 0% at the first date it has data inside the window.
Max 12 lines for readability
Period
From To
Full Period Equity Curve
Drawdown from Peak
Reference
Semiconductor supply chain
How a chip gets made — from IP licensing through to packaging. Hover any ticker for detail.
Core production chain
IP / EDA
Architecture IP and design tool vendors every chip company depends on
— Architecture IP
ARM RMBS
— EDA / Design Tools
SNPS CDNS
→
Fabless design
Design chips in silicon — outsource all manufacturing to foundries
— AI Compute / GPU
NVDA↔ Server CPU AMD↔ Server CPU
— Custom ASIC / Broadband
AVGO↔ Interconnect MRVL↔ Interconnect
— CPU / Architecture
INTC↔ Foundry ARM↔ IP/EDA
— Server CPU (Captive)
AMZN Graviton Ampere (pvt)
→
Interconnect
NEW
Chip-to-chip and rack-to-rack bandwidth — the AI scaling bottleneck
— Interconnect / Retimer
CRDO ALAB MRVL↔ Fabless
— Switching Fabric
AVGO↔ Fabless
— Co-Packaged Optics
CIEN LITE
→
Foundry / IDM
Fabricate wafers — pure-play foundries or integrated device manufacturers
— Leading-Edge
TSM↔ Adv. Pkg Samsung
— Mature / Specialty
UMC GFS TSEM
— IDM
INTC↔ Fabless
→
Adv. packaging
NEW
CoWoS, HBM stacking, glass core — chokepoint between chip and system
— CoWoS / Chiplet
TSM↔ Foundry
— OSAT / Packaging
ASX AMKR
— Test / Handler
TER
→
OSAT / packaging
Test and package finished wafers into chips that ship in products
— OSAT / Packaging
ASX AMKR
— Test / Handler
TER
Enabling layers — support the entire chain
Wafer fab equipment
Build and maintain the machines that fabricate wafers at foundries
— Lithography
ASML
— Deposition / Etch
AMAT LRCX Tokyo Electron
— Cleaning
ACMR Tokyo Electron
— Inspection / Metrology
KLAC NVMI ONTO
— Specialty Materials
ENTG
— Test / Handler
TER
Memory
Integrated device manufacturers — design and fab their own memory chips
— DRAM / HBM
MU SK Hynix Samsung
— NAND / SSD
MU WDC SNDK Samsung Kioxia
Power semiconductors
NEW
GaN and SiC enable the power density that AI data centres require
— Power Management
MPWR ON WOLF
— GaN / SiC (High-Voltage)
WOLF ON
— DC Bus / Grid Interface
VRT ETN
Server CPUs
NEW
Orchestration layer — sits alongside GPUs in every AI rack
— x86 Server
AMD↔ Fabless INTC↔ Fabless
— Custom ARM Server
NVDA↔ Fabless
— Captive / Private
AMZN Graviton Ampere (pvt)
Analog / MCU / Auto
Mixed-signal, microcontrollers, and automotive chips
— Broad Analog
TXN ADI
— MCU / Embedded
MCHP STM
— Auto / Mixed-Signal
NXPI
Connectivity / RF
Wireless and radio-frequency chips for mobile, defence, and infrastructure
— Mobile RF / Front-End
QCOM SWKS QRVO
— Defense / Microwave
MTSI
— Mixed-Signal / Audio
CRUS
↔ label = dual-classified (ticker appears in multiple sections)  ·  Italic tags = captive or private — context only, no ticker  ·  NEW = added for AI buildout coverage